You can apply through our website - https://www.EVangelise.org.in/ or the challenge page at the Startup India website.

The themes as listed above cover a broad variety of solutions and technologies, if you believe your tech/solution is relevant to the above listed themes, then please do apply.

International participants are encouraged to apply! Depending on the merit of the startup/technology proposed, iCreate may offer special support as well.

There are a total 24 prizes to be won, spread across each innovation theme in ‘Tech Development’ Innovation Category of this event. In ‘Manufacturing Partnership’ Innovation Category, top 3 winners will be awarded Strategic manufacturing partnerships with EV industry players, so that their innovations get the opportunity and support to be commercialized at scale.

Registrations open on the 27 June 2023 for the challenge and registrations will close on 24 September 2023.

If you are not selected in any stages then the applicant cannot continue for this event, however they may still be suitable for other acceleration or funding programs at iCreate (icreate.org.in), you can go through our website for the same.

You can check the update on email or the startup India portal where you have submitted your application using a registered email address. You will also receive a mail on registered email address. You can find contact details in the Contact Us Page.

No

Yes, expenses incurred in the complete event by the team is to be borne by the team.

iCreate will not directly provide software but can provide discounts through our partners Mathworks, Solidworks and AWS.

RISC-V is an open-source instruction set architecture (ISA) designed to be simple, modular, and extensible. It is a free and open standard that allows anyone to design, implement, and modify processors based on the architecture.

RISC-V is significant because it provides an open and royalty-free ISA, enabling greater accessibility, collaboration, and innovation in the processor design space. It allows companies, universities, and individuals to customize and optimize processors for their specific needs without the restrictions of proprietary architectures.

RISC-V was initially developed by researchers at the University of California, Berkeley, in 2010. However, it has since evolved into a global collaborative effort, with contributions from a wide range of organizations and individuals worldwide.

No, RISC-V is not limited to academic or research purposes. It has gained significant industry traction, and several companies have developed and released commercial RISC-V-based processors for various applications.

RISC-V, ARM, and x86 are different instruction set architectures. RISC-V stands out due to its open nature, enabling unrestricted access, modification, and collaboration. ARM and x86, on the other hand, are proprietary architectures with their own licensing models and restrictions.

RISC-V processors can run standard software, including operating systems and applications. Compilers and development tools are available that target the RISC-V ISA, making it compatible with existing software ecosystems.

No, RISC-V is not limited to low-power or embedded systems. While it is suitable for such applications, the architecture is scalable and can be used in a wide range of devices, including mobile devices, servers, high-performance computing, and more.

Yes, there are RISC-V-based products available in the market. Several companies have released RISC-V processors, development boards, and other hardware and software solutions. Some examples include SiFive, Western Digital, Andes Technology, and more.

Some benefits of using RISC-V include its open nature, which encourages innovation and collaboration; its simplicity, which eases processor design and optimization; and its modular design, which allows for customization based on specific application requirements.

Yes, there are RISC-V-based development boards available for prototyping and experimentation. Examples include the HiFive series from SiFive and various development boards from other manufacturers that feature RISC-V processors.

The team shall comprise a maximum of 3 members.